发明名称 Processor fault tolerance through translation lookaside buffer refresh
摘要 Techniques are provided herein to provide a processor device that has tolerance for faults associated with operations of a translation lookaside buffer. In a processor device, contents of a translation lookaside buffer are stored in a memory that is protected by an error correction code (ECC) to provide an ECC-protected backup copy of the contents of the translation lookaside buffer. When a miss exception of the translation lookaside buffer is triggered during execution of a processor function, the contents of the translation lookaside buffer is refreshed with the ECC-protected backup copy. Future operations of the processor are made using the refreshed contents of the translation lookaside buffer.
申请公布号 US8429135(B1) 申请公布日期 2013.04.23
申请号 US20090482641 申请日期 2009.06.11
申请人 LANG STEVEN M.;CISCO TECHNOLOGY, INC. 发明人 LANG STEVEN M.
分类号 G06F7/00;G06F17/00 主分类号 G06F7/00
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