发明名称 LEVEL CONVERTER AND PROCESSOR
摘要 <P>PROBLEM TO BE SOLVED: To provide a level converter that prevents the generation of a through current attributable to a transistor for power sequence control. <P>SOLUTION: According to one aspect of an embodiment, the level converter includes: a level conversion circuit for converting an input signal having a first logic level at a second voltage level lower than a first voltage level and a second logic level at a reference voltage level to a signal having a first logic level at the first voltage level and a second logic level at the reference voltage level; a control signal generation circuit for outputting a control signal having the reference voltage level when a second power supply for outputting the second voltage level is off and having the first voltage level when the second power supply is on; and a connection circuit disposed between a first power line connected to a first power supply for outputting the first voltage level and an output node of the level conversion circuit to electrically connect the output node to the first power line when the second power supply is off and electrically disconnect the output node from the first power line when the second power supply is on in response to the control signal. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013074339(A) 申请公布日期 2013.04.22
申请号 JP20110209914 申请日期 2011.09.26
申请人 FUJITSU LTD 发明人 SAKAE TATSUYA;KANAYAMA YASUTAKA;TOKUHIRO NORIYUKI
分类号 H03K19/0185 主分类号 H03K19/0185
代理机构 代理人
主权项
地址