| 摘要 |
<P>PROBLEM TO BE SOLVED: To improve a voltage variation worst pattern in which computing elements are simultaneously activated among different processors. <P>SOLUTION: An arithmetic processing unit 100 according to the present invention includes a plurality of processing circuits 120A-120N having a plurality of computing elements that can be simultaneously executed, and a control circuit 110 for summing up the total number of the computing elements being executed in the respective processing circuits. Each of the plurality of processing circuits 120A-120N determines whether or not to execute the computing element which is not executed among the computing elements provided therein according to a sum-up result summed up by the control circuit 110. <P>COPYRIGHT: (C)2013,JPO&INPIT |
