| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an arithmetic processing unit for preventing a logical address space whose use frequency is high from being frequently replaced. <P>SOLUTION: An arithmetic processing unit connected to a storage device having a buffer area in which an address conversion counterpart is stored includes: an LRU register for storing the number of a logical address register whose use history is the oldest among a plurality of logical address registers; a reading section (S502) for, when the logical address included in an access request to the storage device is not present in the range of a logical address space from a lower limit logical address stored in a lower limit logical address register to an upper limit logical address stored in an upper limit logical address register, reading the number of the logical address register stored by the LRU register; and a setting section (S410) for invalidating the logical address register of the read number, and for setting the logical address space corresponding to the logical address included in the access request in the invalidated logical address register. <P>COPYRIGHT: (C)2013,JPO&INPIT |
