发明名称 POST-PASSIVATION INTERCONNECT STRUCTURE
摘要 A semiconductor device includes a passivation layer, a first protective layer, an interconnect layer, and a second protective layer successively formed on a semiconductor substrate. The interconnect layer has an exposed portion, on which a barrier layer and a solder bump are formed. At least one of the passivation layer, the first protective layer, the interconnect layer and the second protective layer includes at least one slot formed in a region outside a conductive pad region.
申请公布号 US2013093077(A1) 申请公布日期 2013.04.18
申请号 US201113272540 申请日期 2011.10.13
申请人 LIANG SHIH-WEI;CHEN HSIEN-WEI;CHEN YING-JU;YU TSUNG-YUAN;LII MIRNG-JI;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 LIANG SHIH-WEI;CHEN HSIEN-WEI;CHEN YING-JU;YU TSUNG-YUAN;LII MIRNG-JI
分类号 H01L23/48;H01L23/52 主分类号 H01L23/48
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