FinFET parasitic capacitance reduction using air gap

摘要

A transistor, such as a FinFET, includes a gate structure 6, 102 disposed over a substrate. The gate structure has a width and also a length and a height defining two opposing sidewalls of the gate structure. The transistor further includes at least one electrically conductive channel between a source region and a drain region that passes through the sidewalls of the gate structure; a dielectric layer 310 disposed over the gate structure and portions of the electrically conductive channel that are external to the gate structure; and an air gap 314 underlying the dielectric layer. The air gap is disposed adjacent to the sidewalls of the gate structure and functions to reduce parasitic capacitance of the transistor. At least one method to fabricate the transistor is also disclosed.