发明名称 METHOD FOR TESTING MULTI-CHIP STACK -ED PACKAGES
摘要 <p>PURPOSE: A method for testing multichip stack packages is provided to measure testing electrodes in chip cubes in which a small number of substrates are used without changing a tape carrier. CONSTITUTION: One or more chip cubes(100) in which a small number of substrates are used are provided. A plurality of testing electrodes(130) are arranged on the surface of a top chip(110) of the chip cube. The chip cube is attached to an adhesive tape(252) with the testing electrodes. The adhesive tape is attached to an inner side of a hole(251) of a tape carrier(250). Filling materials are formed on the adhesive tape to completely fill gaps(120) between the stacked chips. The tape carrier is fixed to a wafer testing carrier.</p>
申请公布号 KR20130037105(A) 申请公布日期 2013.04.15
申请号 KR20110101477 申请日期 2011.10.05
申请人 POWERTECH TECHNOLOGY INC. 发明人 CHANG KAI JUN
分类号 H01L21/66;H01L23/12 主分类号 H01L21/66
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