发明名称 STUB MINIMIZATION FOR MULTI-DIE WIREBOND ASSEMBLIES WITH PARALLEL WINDOWS
摘要 A microelectronic package 10 can include a substrate 20 having first and second surfaces 21, 22 and first and second apertures 26a, 26b extending therebetween, first and second microelectronic elements 30a, 30b each having a surface 31 facing the first surface, and terminals 25a exposed at the second surface in a central region 23 thereof. The apertures 26a, 26b can have first and second parallel axes 29a, 29b extending in directions of the lengths of the respective apertures. The central region 23 of the second surface 22 can be disposed between the first and second axes 29a, 29b. The terminals 725a can include a first set 715a disposed on a first side of a theoretical third axis 729c and a second set 715b disposed on a second side of the third axis opposite from the first side. The signal assignments of the first terminals 725a in the first set 715a can be a mirror image of the signal assignments of the first terminals in the second set 715b.
申请公布号 WO2013052370(A2) 申请公布日期 2013.04.11
申请号 WO2012US57895 申请日期 2012.09.28
申请人 INVENSAS CORPORATION 发明人 CRISP, RICHARD, DEWITT;ZOHNI, WAEL;HABA, BELGACEM;LAMBRECHT, FRANK
分类号 主分类号
代理机构 代理人
主权项
地址