A reset circuit comprising: a first depletion mode device having a first terminal coupled to a node at a reset voltage and a second terminal for providing a reset signal to at least one device; and a control circuit arranged to switch the first depletion mode device into a high impedance state after a first predetermined period.
申请公布号
WO2013052203(A1)
申请公布日期
2013.04.11
申请号
WO2012US50927
申请日期
2012.08.15
申请人
ANALOG DEVICES, INC;SPALDING, GEORGE, REDFIELD, JR.;PEPPIETTE, ROGER;O'LEARY, FINBARR, CHRISTOPHER
发明人
SPALDING, GEORGE, REDFIELD, JR.;PEPPIETTE, ROGER;O'LEARY, FINBARR, CHRISTOPHER
