摘要 |
1,094,248. Selective signalling. HONEYWELL Inc. June 14,. 1966 [June 22, 1965], No. 26508/66. Heading G4H. In an analogue-to-digital converter of the type in which an input signal is integrated for a known period, the effects of a spurious A.C. ripple superimposed upon the input are eliminated by performing the integration for two periods, the first starting with a positive-going zero-cross-over of the spurious ripple, and the second with a negative-going, zero-cross-over. As described the input signal (with the spurious ripple) is applied direct from a terminal. 11, Fig. 1, to an integrator 14 and the ripple is filteredout 12 and applied to a zero cross-over detector 13. A timing pulse 18, intended to start an integration cycle, is delayed from reaching the integrator 14 by a flip-flop 21 until the next positive-going zero cross-over of the ripple occurs, at which instant a pulse passes from " and " gate 16 to open a gate 22. When the integration cycle is complete, the integrator produces a pulse, on a lead 32, which is delayed by a flip-flop 27 and used to start a further integration cycle when the next negative-going zero cross-over of the ripple occurs. The average of the results obtained in the two integration cycles will be independent of the ripple. |