发明名称 Microcomputer system
摘要 It is an object of the present invention to provide a technology that a microcomputer is capable of detecting the states of a large number of switches with a small number of ports. In a microcomputer system according to the present invention, any one of (2N−1) kinds of the combination patterns with respect to the combination of N input ports (IP1 to IP4) of a microcomputer (1) is allocated to each of M push-down switches (SW12, SW13, SW14, SW23, SW24, and SW34) with the different combination from each push-down switch. Each push-down switch inverts the input levels of the input ports in the combination pattern allocated thereto when pushed down. The microcomputer (1) detects the state of each push-down switch on the basis of the input levels of the N input ports.
申请公布号 US8415836(B2) 申请公布日期 2013.04.09
申请号 US20080667854 申请日期 2008.07.01
申请人 SAKURAGI ATSUSHI;HAYAOKA HIROSHI;TAKEUCHI TAKAYUKI;RENESAS ELECTRONICS CORPORATION 发明人 SAKURAGI ATSUSHI;HAYAOKA HIROSHI;TAKEUCHI TAKAYUKI
分类号 H01H31/10;H01H19/14;H01H33/52;H01H33/59;H01H47/00;H01H85/46 主分类号 H01H31/10
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