发明名称 |
ETSOI CMOS with back gates |
摘要 |
A structure has a functional region having a first type of conductivity and a top surface. The functional region is connected to a bias contact. The structure further includes an insulating layer; a semiconductor layer and first and second transistor devices having the same type of conductivity disposed upon the semiconductor layer. The structure further includes a first back gate region adjacent to the top surface and underlying one of the transistor devices, the first back gate region having a second type of conductivity; and a second back gate region adjacent to the top surface and underlying the other one of the transistor devices, the second back gate region having the first type of conductivity. The first transistor device has a first characteristic threshold voltage and the second transistor device has a second characteristic threshold voltage that differs from the first characteristic threshold voltage. |
申请公布号 |
US8415743(B2) |
申请公布日期 |
2013.04.09 |
申请号 |
US201113114410 |
申请日期 |
2011.05.24 |
申请人 |
CAI JIN;DENNARD ROBERT H;KHAKIFIROOZ ALI;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CAI JIN;DENNARD ROBERT H;KHAKIFIROOZ ALI |
分类号 |
H01L27/092 |
主分类号 |
H01L27/092 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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