| 摘要 |
PURPOSE: A test apparatus and a test method are provided to reduce power consumption for transmitting an address by decreasing the change of the address outputted to a target memory. CONSTITUTION: A selection unit(52) selects whether to invert a bit of an address generated by an address generating unit and to supply the inverted address to a target memory. An inversion processing unit(54) inverts the bit of the address generated by the address generating unit and outputs the inverted address if the selection unit selects the bit inversion of the address. The inversion processing unit does not invert the bit of the address generated by the address generating unit and outputs the non-inverted address if the selection unit selects the bit non-inversion of the address. A supply unit(22) supplies an inversion cycle signal to a target memory. The inversion cycle signal shows whether the inversely controlled address outputted by the inversion processing unit and the address outputted by the inversion processing unit are bit-inverted addresses. [Reference numerals] (50) Bit number setting unit; (52) Selection unit; (54) Inversion processing unit; (64) Determination unit; (AA) Address; (BB) Inversion controlled address; (CC) Inverse cycle signal; (DD) Comparison address; |
