| 摘要 |
<P>PROBLEM TO BE SOLVED: To eliminate increase in transmission delay while preventing up-sizing of the circuitry and device scale, by reducing the processing load when designing a filter. <P>SOLUTION: Filter buffer evaluation means 11 in a design filter type selection section 10 calculates a filter type evaluation value V<SB POS="POST">i_1</SB>indicating validity for the filter buffer 40 of each filter type i(=1...N) by using the past filter information stored in a filter buffer 40, based on the newness T<SB POS="POST">i_1</SB>of the past filter. Filter buffer evaluation determination means 12 selects preset L(<N) filter types, in the ascending order of filter type evaluation value V<SB POS="POST">i_1</SB>. A filter design section 20 designs a filter in the current frame, for L filter types selected by the design filter type selection section 10. Consequently, the number of filters to be designed anew can be reduced. <P>COPYRIGHT: (C)2013,JPO&INPIT |
