| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an ESD protection circuit with which a lower clamping voltage can be achieved without adversely affecting the parasitic capacitance. <P>SOLUTION: An ESD protection circuit comprises a plurality of bipolar transistors, namely a plurality of ESD current conducting transistors (q1, q2, q4) in a main ESD current conducting path between a first terminal and a second terminal (T1, T2), and further comprises at least one driving transistor (q3) connected in parallel to at least one of the ESD current conducting transistors (q1) and provided for conducting a driving current (Ib2) to one or more of the ESD current conducting transistors (q2) on occurrence of an ESD event. <P>COPYRIGHT: (C)2013,JPO&INPIT |
