发明名称 METHOD FOR MANUFACTURING ELECTRODE AND CONNECTION IN BACK GATE PROCESS
摘要 <p>Provided is a method for manufacturing simultaneously an electrode and a contact connection in a back gate process, comprising: forming a gate groove (17) in an inter-layer dielectric layer (16) on a substrate (10); forming a fill layer (18) in the gate groove and on the inter-layer dielectric layer; etching the fill layer and the inter-layer dielectric layer until the substrate is exposed, forming source/drain contact holes (21); removing the fill layer, exposing the gate groove and the source/drain contact holes; forming in the source/drain contact holes a metal silicide, depositing in the gate groove a gate dielectric layer (26) and a metal gate (27); filling a metal into the gate groove and the source/drain contact holes; and flattening the metal filled. In the manufacturing method, a gate electrode connection uses a metal material identical to that of the contact holes, thus allowing the completion of both by using a one-step chemical-mechanical planarization (CMP) process. This, on the one hand, simplifies the degree of complexity of process integration, while on the other hand, improves greatly the control over defects by the CMP process, and prevents the defects of corrosion and depression that are possible between different metal materials.</p>
申请公布号 WO2013033875(A1) 申请公布日期 2013.03.14
申请号 WO2011CN01991 申请日期 2011.11.29
申请人 INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OFSCIENCES;YANG, TAO;ZHAO, CHAO;LI, JUNFENG;YAN, JIANG;HE, XIAOBIN;LU, YIHONG 发明人 YANG, TAO;ZHAO, CHAO;LI, JUNFENG;YAN, JIANG;HE, XIAOBIN;LU, YIHONG
分类号 H01L21/768 主分类号 H01L21/768
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