发明名称 Accelerated access apparatus and reading and writing methods thereof
摘要 An accelerated access apparatus and reading and writing methods thereof are described. A processing unit is used to determine whether the continuation state of a plurality of first address parameters of first request signals. Each first request signal has a first address length. When the first address parameters are continuous thereamong, the processing unit converts one of the second request signals into a second reading command which has a second reading address and a second reading address length. The second reading address length is greater than one of the first address lengths. The processing unit executes the second reading command to read data content to be stored in a buffer unit based on the second reading address and the second reading address length for responding to the second request signals.
申请公布号 US8392620(B2) 申请公布日期 2013.03.05
申请号 US20090643941 申请日期 2009.12.21
申请人 LIN JIN-MIN;GENESYS LOGIC, INC. 发明人 LIN JIN-MIN
分类号 G06F3/00 主分类号 G06F3/00
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