发明名称 Memory circuits, systems, and operating methods thereof
摘要 A memory circuit includes at least one memory cell for storing a charge representative of a datum. The memory cell is coupled with a word line and a bit line. The memory circuit includes a means for providing a bit line reference voltage VBLref to the bit line, wherein a VBLref/VDD ratio of the bit line reference voltage VBLref to a power voltage VDD is adjustable corresponding to a change of the power voltage VDD.
申请公布号 US8391094(B2) 申请公布日期 2013.03.05
申请号 US20100692534 申请日期 2010.01.22
申请人 HUANG MING-CHIEH;HSU KUOYUAN PETER;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 HUANG MING-CHIEH;HSU KUOYUAN PETER
分类号 G11C5/04 主分类号 G11C5/04
代理机构 代理人
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