Vertical structured non-volatile microelectronic memory device, has memory element and transistor, which are connected in parallel between each other via conducting line on which element and transistor rest and another conducting line

摘要

The device has stages (N1-Nk) superimposed for forming a pile, where one of the stages is made of a variable resistance memory element (C1) including a variable resistivity material area (118). The area is interposed between two electrodes (112, 121). The element includes an interrupt transistor (T1) e.g. vertical channel junction gate FET, including a semiconductor structure (132) that forms a channel. The element and the transistor are connected in parallel between each other via a conducting line (L1) on which the element and transistor are positioned, and another conducting line (L2). The memory element is a resistive RAM (RRAM). An independent claim is also included for a method for realizing a microelectronic memory device.