| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor circuit and a testing method which efficiently specify a defective test target circuit on the basis of test result information of a plurality of test target circuits, which is outputted from a scan chain. <P>SOLUTION: The semiconductor circuit includes: a plurality of test target circuits; a plurality of first latch circuits provided correspondingly to the test target circuits; a second latch circuit; a plurality of internal test circuits which cause the test target circuits to execute a test operation, on the basis of input signals inputted in the order of pattern address, of a test pattern where the input signals are prescribed correspondingly to pattern addresses, and output quality determination values based on operation results to the first latch circuits respectively; a synthetic determination circuit which, if the plurality of quality determination values include a quality determination value showing that the quality is defective, outputs this quality determination value to the second latch circuit; and a connection path which constitutes a scan chain by connecting the plurality of first latch circuits and the second latch circuit so that the value held in the second latch circuit is first outputted. When an input signal indicates a scan output mode, quality determination values held in the first and second latch circuits are outputted in order as output values from the scan chain. <P>COPYRIGHT: (C)2013,JPO&INPIT |
