| 摘要 |
A data processing apparatus, comprising processing circuitry, which in use, generates data and debug circuitry arranged to debug operation of the processing circuitry. The processing circuitry includes bus circuitry arranged to pass data at least one of into and out of the processing apparatus over a communication bus. The debug circuitry comprises monitoring circuitry arranged to monitor the data generated, in use, by the processing circuitry and generate a stream of trace elements. An interface unit is arranged to interface, using the bus circuitry, the trace elements generated by the monitoring circuitry onto the communication bus to be output, in use, from the processing apparatus using the communication bus. The interface unit comprises a controller which is arranged to control operation of the interface unit independently of the operation of the processing circuitry.
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