发明名称 EPITAXIAL EXTENSION CMOS TRANSISTOR
摘要 A pair of horizontal-step-including trenches are formed in a semiconductor layer by forming a pair of first trenches having a first depth around a gate structure on the semiconductor layer, forming a disposable spacer around the gate structure to cover proximal portions of the first trenches, and by forming a pair of second trenches to a second depth greater than the first depth. The disposable spacer is removed, and selective epitaxy is performed to form an integrated epitaxial source and source extension region and an integrated epitaxial drain and drain extension region. A replacement gate structure can be formed after deposition and planarization of a planarization dielectric layer and subsequent removal of the gate structure and laterally expand the gate cavity over expitaxial source and drain extension regions. Alternately, a contact-level dielectric layer can be deposited directly on the integrated epitaxial regions and contact via structures can be formed therein.
申请公布号 US2013032859(A1) 申请公布日期 2013.02.07
申请号 US201113198152 申请日期 2011.08.04
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION;PEI CHENGWEN;WANG GENG;ZHANG YANLI 发明人 PEI CHENGWEN;WANG GENG;ZHANG YANLI
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
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