发明名称 INFORMATION PROCESSING SYSTEM
摘要 <P>PROBLEM TO BE SOLVED: To enable impedance control of a data terminal even in a period of entry in a self-refresh mode. <P>SOLUTION: A controller 50 according to one embodiment allows a semiconductor device 10 to enter a self-refresh mode by issuing a self-refresh command SRE to the semiconductor device 10. The semiconductor device 10 always activates an input buffer circuit 72 for receiving an impedance control signal ODT even in the self-refresh mode, and allows bypass of a latch circuit 84 that synchronizes itself with an internal clock signal ICLK0 and latches the impedance control signal IODT0, in the self-refresh mode. This enables input of the impedance control signal ODT in the self-refresh mode without using an external clock signal CK. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013030001(A) 申请公布日期 2013.02.07
申请号 JP20110165714 申请日期 2011.07.28
申请人 ELPIDA MEMORY INC 发明人 FUJISAWA HIROKI
分类号 G06F12/00;G06F13/16;G11C11/403;G11C11/4076;G11C11/4093 主分类号 G06F12/00
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