发明名称 Programmable Packet Processor With Flow Resolution Logic
摘要 A programmable packet switching controller has a packet buffer, a pattern match module, a programmable packet classification engine and an application engine. The packet classification engine has a decision tree-based classification logic for classifying a packet. The application engine has a number of programmable sub-engines arrayed in a pipelined architecture. The sub-engines include a source lookup engine, a destination lookup engine and a disposition engine, which are used to make a disposition decision for the inbound packets in a processing pipeline.
申请公布号 US2013034101(A1) 申请公布日期 2013.02.07
申请号 US201213597060 申请日期 2012.08.28
申请人 CATHEY JIM;MICHELS TIMOTHY S. 发明人 CATHEY JIM;MICHELS TIMOTHY S.
分类号 H04L12/56;H04L29/06 主分类号 H04L12/56
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