发明名称 |
Method and apparatus for designing an integrated circuit using inverse lithography technology |
摘要 |
Method and apparatus for designing an integrated circuit by calculating an optimised reticle layout design from an IC layout design and a model describing an optical system for transferring the IC layout design onto a semiconductor wafer using a reticle, wherein the IC layout design comprises features defined by a plurality of boundaries. Approximating the plurality of boundaries to generate an approximated IC layout design suitable for the manufacture of the IC. Performing OPC simulation on at least a portion of the approximated IC layout design.
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申请公布号 |
US8370773(B2) |
申请公布日期 |
2013.02.05 |
申请号 |
US20100377664 |
申请日期 |
2010.08.03 |
申请人 |
FREESCALE SEMICONDUCTOR, INC.;KONINKLIJKE PHILIPS ELECTRONICS N.V.;LUCAS KEVIN DEAN;BOONE ROBERT ELLIOTT;RODY YVES |
发明人 |
LUCAS KEVIN DEAN;BOONE ROBERT ELLIOTT;RODY YVES |
分类号 |
G06F17/50;G03F1/00;G03F1/36 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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