发明名称 Harmonics suppression control circuit for a PWM inverter.
摘要 <p>In an apparatus for carrying out PWM control of an inverter having a filter connected to the a.c. output side thereof, pulse patterns adapted for determining switching timings for canceling a specified harmonic component, e.g., the fifth order harmonic component included in a voltage on the output side of the filter without exerting an influence on the output voltage fundamental wave, are stored in advance into a memory with respect to various vector quantities of the specified harmonic component to select, from a plurality of pulse patterns stored in the memory, each time a pulse pattern for reducing the specified harmonic component. The inverter is subjected to PWM control in accordance with the pulse pattern thus selected.</p>
申请公布号 EP0319910(A2) 申请公布日期 1989.06.14
申请号 EP19880120349 申请日期 1988.12.06
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 NAKAJIMA, KIHEI;SATO, SHINJI
分类号 H02M7/48;H02M7/527 主分类号 H02M7/48
代理机构 代理人
主权项
地址
您可能感兴趣的专利