发明名称 |
NAND based resistive sense memory cell architecture |
摘要 |
Various embodiments are directed to an apparatus comprising a semiconductor memory array with non-volatile memory unit cells arranged into a NAND block. Each of the unit cells comprises a resistive sense element connected in parallel with a switching element. The resistive sense elements are connected in series to form a first serial path, and the switching elements are connected in series to form a second serial path parallel to the first serial path. Each resistive sense element is serially connected to an adjacent resistive sense element in the block by a tortuous conductive path having a portion that extends substantially vertically between said elements to provide operational isolation therefor.
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申请公布号 |
US8363442(B2) |
申请公布日期 |
2013.01.29 |
申请号 |
US20100903716 |
申请日期 |
2010.10.13 |
申请人 |
SEAGATE TECHNOLOGY LLC;LIU HARRY HONGYUE;XI HAIWEN;KHOUEIR ANTOINE;XUE SONG |
发明人 |
LIU HARRY HONGYUE;XI HAIWEN;KHOUEIR ANTOINE;XUE SONG |
分类号 |
G11C5/02 |
主分类号 |
G11C5/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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