发明名称 INTEGRATED CIRCUIT AND METHOD FOR DEFENDING AGAINST POWER ATTACK
摘要 <p>Provided are an integrated circuit and a method for defending against a power attack. The integrated circuit comprises: a power source, a power source management module (2), an algorithm module (3), a storage unit (4), control logic (5) and an attack defense module (6). The attack defense module (6) has a true random number generator (9) and a scrambling algorithm module (10). A CMOS integrated circuit is used in the scrambling algorithm module (10). The method utilizes the scrambling algorithm module (10) to process N random signals Xctrl[N:l], so as to generate N control signals Yctrl[N:l]. The integrated circuit and method enables a random consumption circuit to have a high degree of randomness, thereby desirably covering the power curve, and enhancing the security and reliability of information communication of the entire chip.</p>
申请公布号 WO2013010362(A1) 申请公布日期 2013.01.24
申请号 WO2011CN83060 申请日期 2011.11.28
申请人 CHINA ELECTRIC POWER RESEARCH INSTITUTE;STATE GRID CORPORATION OF CHINA;YUAN, YIDONG;WANG, JINXIONG;MA, LEI;WANG, XIAOMAN;LI, NA 发明人 YUAN, YIDONG;WANG, JINXIONG;MA, LEI;WANG, XIAOMAN;LI, NA
分类号 G06F21/76 主分类号 G06F21/76
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