发明名称 METHOD FOR FILLING CU FILLING OF NON DEFECT IN VIA USING CURRENT DENSITY CONTROL
摘要 PURPOSE: A method for filling a CU filling material having non defect in a via is provided to prevent the electrical short of a semiconductor device. CONSTITUTION: A via(130) is formed in a silicon wafer(110). A CU filling material having no defect is filled in a via. Electric current density is controlled in the filling. The Cu filling material is filled by controlling electric current density. The filling is performed on a lower, a middle portion and an upper portion of the via. [Reference numerals] (AA) Low current authorization; (BB) Middle current authorization; (CC) High current authorization
申请公布号 KR20130008915(A) 申请公布日期 2013.01.23
申请号 KR20110069604 申请日期 2011.07.13
申请人 UNIVERSITY OF SEOUL INDUSTRY COOPERATION FOUNDATION. 发明人 JUNG, JAE PIL;KIM, JONG HYEONG;LEE, WANG KOO;HONG, SUNG CHUL;JUNG, DO HYUN
分类号 H01L21/28 主分类号 H01L21/28
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