| 摘要 |
The invention is intended to curtail the circuit scale of the error correction circuit of a flash memory. The invention relates to a controller with error correction function capable of controlling writing and reading of data in a plurality of memories, including a buffer memory, an error correction circuit, and a plurality of interface modules provided individually corresponding to each one of the plurality of memories, for exchanging data with the memories, in which the plurality of interface modules have a plurality of syndrome generation function parts for receiving sector data from the memories and error correction codes corresponding to the sector data, and generating syndromes on the basis of the received sector data and error correction codes, the buffer memory temporarily stores the plurality of sector data, and the error correction circuit determines the address having an error corresponding to each one of the syndromes generated by the plurality of syndrome generation function parts, and corrects the bit corresponding to such address in the sector data stored in the buffer memory.
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