发明名称 MEMORY MODULE BUS TERMINATION VOLTAGE (VTT) REGULATION AND MANAGEMENT
摘要 <p>Embodiments of the present disclosure describe memory module bus termination voltage (VTT) regulation and management techniques and configurations. A method includes receiving, by a register, a signal that is driven over a bus to a memory device comprising a plurality of memory cells and setting, within the register, a termination voltage (VTT) for the bus based on the signal. Other embodiments may be described and/or claimed.</p>
申请公布号 WO2013002929(A1) 申请公布日期 2013.01.03
申请号 WO2012US39726 申请日期 2012.05.25
申请人 INTEL CORPORATION;BAINS, KULJIT S.;VERGIS, GEORGE 发明人 BAINS, KULJIT S.;VERGIS, GEORGE
分类号 G11C5/14;G11C7/10 主分类号 G11C5/14
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