发明名称 SCHEDULING PACKETS IN A PACKET-PROCESSING PIPELINE
摘要 The disclosed embodiments relate to a packet-processing system. This system includes an input which is configured to receive packets, wherein the packets include control-message (CM) packets and traffic packets. It also includes a pipeline to process the packets, wherein the pipeline includes access points for accessing an engine which services requests for packets, wherein CM packets and traffic packets access the engine through different access points. The system additionally includes an arbiter to schedule packets entering the pipeline. While scheduling the packets, the arbiter is configured to account for empty slots in the pipeline to ensure that when CM packets and traffic packets initiate accesses to the engine through different access points, the accesses do not cause an overflow at an input queue for the engine.
申请公布号 US2013003556(A1) 申请公布日期 2013.01.03
申请号 US201113170427 申请日期 2011.06.28
申请人 XELERATED AB;BODEN KURT THOMAS;CARLSTROEM JAKOB 发明人 BODEN KURT THOMAS;CARLSTROEM JAKOB
分类号 H04L12/26 主分类号 H04L12/26
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