METHOD FOR MANUFACTURING SEMICONDUCTOR FIELD EFFECT TRANSISTOR

摘要

Disclosed is a method for manufacturing a semiconductor field effect transistor, which comprises: forming a semiconductor substrate of a local silicon on insulator (SOI) structure having a local buried isolation dielectric layer; forming a fin on a silicon substrate located on the local buried isolation dielectric layer; forming a gate stack structure on the top and side of the fin; forming source/drain structures in the fin on both sides of the gate stack structure; and metallizing. The method employs a conventional top to bottom process based on a quasi plane to realize good compatibility with a CMOS planar process and is liable to integration, and thereby contributes to inhibit the short channel effect and reduces the dimensions of the MOSFETs.