发明名称 TESTMODE CONTROL CIRCUIT FOR SEMICONDUCTOR DEVICE
摘要 PURPOSE: A test mode control circuit of a semiconductor device is provided to reduce power consumption by enabling only the transmission gate circuit unit of a changed test mode control circuit among a plurality of test circuits in a test mode. CONSTITUTION: A test mode enable signal generating unit(110) generates a test mode enable signal in response to a test mode set signal and a plurality of test group selection code signals to select a test circuit. A test mode selection signal control unit(120) receives a test mode selection signal for selecting one among a plurality of test modes and selectively outputs or blocks the received test mode selection signal based on a test mode enable signal level.
申请公布号 KR20120138939(A) 申请公布日期 2012.12.27
申请号 KR20110058381 申请日期 2011.06.16
申请人 SK HYNIX INC. 发明人 PARK, MIN SU;KIM, JAE IL
分类号 G11C29/00 主分类号 G11C29/00
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