| 摘要 |
<p>An entry information storage unit (503) of a request storage unit (0) associates together, and holds, multiple access requests to a continuous area of a DIMM (110) (the main storage device). A pipeline control unit (103) sequentially issues to the DIMM (110) or an H-CPU the multiple associated access requests. A pipeline control unit (103) registers, in a continuous cache line of a cache tag unit (105) and a cache data storage unit (106), multiple sets of response data from the DIMM (110) or the H-CPU to the multiple sequentially issued access requests.</p> |
