发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 In a semiconductor memory device, the output of a regulator is coupled to the inputs of first and second switches, the output of the first switch is coupled to a path for supplying the drain voltage of a memory cell in the first mode, and the output of the second switch is coupled to a path for supplying the gate voltage of the memory cell in the second mode. A fourth switch is placed in parallel with the second switch: the output of the fourth switch is coupled to the output of the second switch, to supply the gate voltage of the memory cell in the first mode. Thus, one regulator is used as both the regulator for the drain voltage of the memory cell and the regulator for the gate voltage of the memory cell.
申请公布号 US2012314515(A1) 申请公布日期 2012.12.13
申请号 US201213591766 申请日期 2012.08.22
申请人 MOCHIDA REIJI;MARUYAMA TAKAFUMI;HAMAMOTO YUKIMASA;PANASONIC CORPORATION 发明人 MOCHIDA REIJI;MARUYAMA TAKAFUMI;HAMAMOTO YUKIMASA
分类号 G11C5/14;G11C7/00 主分类号 G11C5/14
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