发明名称 DATA TRANSFER DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To solve the problem that the scale of hardware to be used by an FIFO or the like is increased in the case of trying to achieve data transfer by byte units. <P>SOLUTION: A byte enable holding circuit 10 for write is configured to hold the byte enable of data written in the latest write address of an FIFO 40, and a byte enable holding circuit 20 for read is configured to hold the byte enable of write data before one timing or the logical sum of the byte enable and self-holding content before one timing or self-holding content before one timing. A byte reading determination flag 50 indicates the presence/absence of full byte reading for one word of the FIFO by decrypting the byte enable of read data. In the case of the absence of the full byte reading, a selector 503 selects the holding content of the circuit 20, and in the case of the presence of the full byte reading, the selector 503 selects and sets the byte enable held by the circuit 10 as the byte enable of read data. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2012243053(A) 申请公布日期 2012.12.10
申请号 JP20110112019 申请日期 2011.05.19
申请人 NEC ENGINEERING LTD 发明人 SOMEYA TOSHIAKI
分类号 G06F13/36 主分类号 G06F13/36
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