| 摘要 |
<P>PROBLEM TO BE SOLVED: To lower resistance of micro wiring easily. <P>SOLUTION: A semiconductor device according to an embodiment comprises first through third semiconductor layers 3a, 3b, 3c laminated in a first direction, and a fin laminate structure extending in a second direction. A first layer select transistor Ta has a first gate electrode 10a and is in a normally-on state on the first semiconductor layer 3a. A second layer select transistor Tb has a second gate electrode 10b and is in a normally-on state on the second semiconductor layer 3b. A third layer select transistor Tc has a third gate electrode 10c and is in a normally-on state on the third semiconductor layer 3c. A region covered with the first gate electrode 10a on the first semiconductor layer 3a, a region covered with the second gate electrode 10b on the second semiconductor layer 3b and a region covered with the third gate electrode 10c on the third semiconductor layer 3c become metal silicides, respectively. <P>COPYRIGHT: (C)2013,JPO&INPIT |
