发明名称 Spur reduction circuit
摘要 A circuit for modulating an input signal including a dither signal generator configured to generate a first dither signal having a maximum amplitude, a deamplifier configured to reduce the amplitude of said input signal so as to generate a deamplified input signal having a maximum amplitude that is comparable to the maximum amplitude of the dither signal, and a summer configured to sum the dither signal with the deamplified input signal.
申请公布号 GB201218492(D0) 申请公布日期 2012.11.28
申请号 GB20120018492 申请日期 2012.10.16
申请人 CAMBRIDGE SILICON RADIO LIMITED 发明人
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