发明名称 Dual mode phase detection
摘要 <p>A method of measuring a phase difference for use in a phase locked loop (PLL) that includes a binary phase detector (BPD), a time-to-digital converter (TDC) and a signal generator, the phase difference being that between a reference signal and a generated signal output from the signal generator. The method includes inputting the reference signal and the generated signal into the TDC; measuring the magnitude of the phase difference at the TDC; if the measured magnitude of the phase difference is less than a threshold value, operating the PLL according to a first operational mode in which the output of the BPD controls the signal generator; and if the measured magnitude of the phase difference is greater than the threshold value, operating the PLL according to a second operational mode in which the output of the TDC and the BPD controls the signal generator.</p>
申请公布号 GB201218504(D0) 申请公布日期 2012.11.28
申请号 GB20120018504 申请日期 2012.10.16
申请人 CAMBRIDGE SILICON RADIO LIMITED 发明人
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