发明名称 CORE ABSTRACTION LAYER INTERFACE
摘要 A method of producing a modem hardware abstraction layer (MHAL) within a first processor associated with a modem of a given radio platform. A MHAL software (SW) device within the first processor is configured to process data and exchange messages among a waveform software application, and a field programmable gate array (FPGA) associated with the radio platform. A core module is defined within the SW device, and the core module operates using a common core set of software that is compatible with a number of different radio platforms including the given platform, for producing certain MHAL interfaces and services. A custom module is defined within the SW device, and the custom module operates using such software as required to be compatible with the FPGA of the given platform, and by invoking the MHAL interfaces or services produced by the core module. Priority thread banding and memory management are also provided.
申请公布号 US2012290823(A1) 申请公布日期 2012.11.15
申请号 US201213460966 申请日期 2012.05.01
申请人 CUIFFO GEORGE A.;FLEURETON MARK P. 发明人 CUIFFO GEORGE A.;FLEURETON MARK P.
分类号 G06F9/00 主分类号 G06F9/00
代理机构 代理人
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