发明名称 Semiconductor memory device having balancing capacitors
摘要 A semiconductor memory device includes a plurality of memory cell blocks including a first memory cell block having bit lines, an edge sense amplifier block including edge sense amplifiers coupled to a portion of the bit lines of the first memory cell block, and a balancing capacitor unit coupled to the edge sense amplifiers.
申请公布号 US8310859(B2) 申请公布日期 2012.11.13
申请号 US20090570159 申请日期 2009.09.30
申请人 SEO HYEOUNG-WON;SHIN SOO-HO;LEE WON-WOO;PARK JEONG-SOO;BYUN YOUNG-YONG;JANG SEONG-JIN;SHIN SANG-WOONG;SAMSUNG ELECTRONICS CO., LTD. 发明人 SEO HYEOUNG-WON;SHIN SOO-HO;LEE WON-WOO;PARK JEONG-SOO;BYUN YOUNG-YONG;JANG SEONG-JIN;SHIN SANG-WOONG
分类号 G11C11/24 主分类号 G11C11/24
代理机构 代理人
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