发明名称 Semiconductor memory device comprising a plurality of static memory cells
摘要 A driver power supply circuit stepping down a power supply voltage is arranged at a power supply node of a word line driver. The driver power supply circuit includes a non-silicide resistance element of N+ doped polycrystalline silicon, and a pull-down circuit lowering a voltage level of the driver power supply node. The pull-down circuit includes a pull-down transistor having the same threshold voltage characteristics as a memory cell transistor pulling down a voltage level of the driver power supply node, and a gate control circuit adjusting at least a gate voltage of the pull-down transistor. The gate control circuit corrects the gate potential of the pull-down transistor in a manner linked to variations in threshold voltage of the memory cell transistor.
申请公布号 US8310883(B2) 申请公布日期 2012.11.13
申请号 US201113193258 申请日期 2011.07.28
申请人 YABUUCHI MAKOTO;NII KOJI;RENESAS ELECTRONICS CORPORATION 发明人 YABUUCHI MAKOTO;NII KOJI
分类号 G11C7/00 主分类号 G11C7/00
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