发明名称 CHECKING AND SORTING APPARATUS FOR SEMICONDUCTOR CHIP AND CHECKING AND SORTING METHOD
摘要 <P>PROBLEM TO BE SOLVED: To improve efficiency in checking a semiconductor chip and the speed of feeding the semiconductor chip to a post-process in a checking and sorting apparatus which checks electrical characteristics of the semiconductor chip and sorting the semiconductor chip to a non-defective chip or a defective chip in accordance with a result of the check. <P>SOLUTION: A checking and sorting apparatus 1 is provided which comprises a placement table 3, a plurality of checking probes 41, a plurality of eject nozzles 51 and a complementary mechanism. On the placement table 3, a conveyer tray 13 is placed. The conveyer tray 13 is configured by arraying a number of accommodation sections 14 accommodating semiconductor chips 10. The plurality of checking probes 41 are provided vertically movable on the placement table and are capable of concurrently checking a plurality of semiconductor chips accommodated in the conveyer tray. The plurality of eject nozzles 51 are provided vertically movable on the placement table and are capable of concurrently ejecting from the conveyer tray a plurality of defective chips for each of which a result of checking electrical characteristics is determined defective by the checking probe. After the defective chip is ejected, the complementary mechanism accommodates another non-defective chip in an empty accommodation section where the defective chip was being accommodated, among a number of accommodation sections in the conveyer tray. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2012220282(A) 申请公布日期 2012.11.12
申请号 JP20110084688 申请日期 2011.04.06
申请人 SHINDENGEN ELECTRIC MFG CO LTD 发明人 YAMAZAKI YASUSHI
分类号 G01R31/26 主分类号 G01R31/26
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