发明名称 Inter-die interconnection interface
摘要 <p>A package comprising a first die; a second die; an interface between the first and second die, said interface being configured to transport a plurality of control signals, wherein the number of control signals is greater than a width of said interface, and at least one of said first and second dies comprising configurable grouping means for providing a plurality of groups of control signals whereby a group of signals is transmitted across the interface together.</p>
申请公布号 EP2333671(B1) 申请公布日期 2012.10.31
申请号 EP20100305122 申请日期 2010.02.05
申请人 STMICROELECTRONICS (GRENOBLE 2) SAS;STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED 发明人 URZI, IGNAZIO ANTONINO;D'AUDIGIER, PHILIPPE;SAUVAGE, OLIVIER;JONES, MICHAEL ANDREW;RYAN, STUART
分类号 G06F13/42;G06F13/38 主分类号 G06F13/42
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