| 摘要 |
<p>A clock signal generation system (10) comprises a clock signal generating circuit (12) arranged to provide a first clock signal having a selectable first clock rate; a divider circuit (14) connected to receive the first clock signal and arranged to generate, depending on a division factor, a second clock signal from the first clock signal, having a constant second clock rate and being synchronized with the first clock signal; and a controller module (16) connected to the divider circuit and arranged to change the division factor when a different first clock rate is selected, to keep the second clock rate constant and the second clock signal synchronized with the first clock signal.</p> |
