发明名称 High performance hardware linked list processors
摘要 In one embodiment, a reassign command is received for reassigning a first node identified by a first global identifier (GID) from a first context identified by a first context ID (CID) to a second context identified by a second CID, the first and second contexts representing first and second linked lists, respectively. A walk-the-chain (WTC) command having the first GID and the first CID is issued to a first linked list processor. The first linked list processor is configured to access one or more nodes of the first context in an attempt to dequeue the first node from the first context. An enqueue command having the first GID and the second CID is issued to a second linked list processor. The second linked list processor is configured to insert the first node to the second context. The first and second linked list processors are cascaded to form a pipeline.
申请公布号 US8295292(B2) 申请公布日期 2012.10.23
申请号 US20100783419 申请日期 2010.05.19
申请人 TSE ALFRED YIU-CHUN;CHEN EDMUND G.;TELEFONAKTIEBOLAGET L M ERICSSON (PUBL) 发明人 TSE ALFRED YIU-CHUN;CHEN EDMUND G.
分类号 H04L12/28 主分类号 H04L12/28
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