| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a circuit design verification apparatus capable of calculating the fan-out of a circuit based on a net list for circuit simulation. <P>SOLUTION: A circuit design verification apparatus comprises a net list dividing part which divides a net list for circuit simulation on a semiconductor device level into a plurality of drive circuits with logic configuration, a gate size calculating part which calculates the gate size from the gate length and the gate width of MOS transistors included in the individual drive circuits, a load capacity calculating part which calculates the load capacity of devices in the subsequent stage driven by the respective drive circuits, and a fan-out calculating part which calculates the fan-out for the individual drive circuits based on the calculated gate size and the calculated load capacity. <P>COPYRIGHT: (C)2013,JPO&INPIT |
