HALL ELEMENT AND MANUFACTURING METHOD THEREFOR, SEMICONDUCTOR DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a Hall element in which the offset voltage Vo can be reduced while limiting increase in cost, and to provide a manufacturing method therefor and a semiconductor device.

SOLUTION: The Hall element has a first N type diffusion region 10 provided in a semiconductor substrate 1, a plurality of second N type diffusion regions 20 provided in the semiconductor substrate 1 and bonded electrically to the first N type diffusion region 10, and an STI region 30 provided in the semiconductor substrate 1 and electrically separating the plurality of second N type diffusion regions 20. The first N type diffusion region 10 is a magneto-sensitive part, and the plurality of second N type diffusion regions 20 are I/O terminals for the magneto-sensitive parts, respectively. The N type impurity concentration in each of the plurality of second N type diffusion regions 20 is 5×1017or more and 3×1019or less pieces/cm3in the range of 0 or more and 0.2 or less μm in the depth direction with a bottom 30b of the STI region 30 as a reference point.

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