发明名称 |
Memory device and method having on-board address protection system for facilitating interface with multiple processors, and computer system using same |
摘要 |
A memory device includes an address protection system that facilitates the ability of the memory device to interface with a plurality of processors operating in a parallel processing manner. The protection system is used to prevent at least some of a plurality of processors in a system from accessing addresses designated by one of the processors as a protected memory address. Until the processor releases the protection, only the designating processor can access the memory device at the protected address. If the memory device contains a cache memory, the protection system can alternatively or additionally be used to protect cache memory addresses. |
申请公布号 |
US8291174(B2) |
申请公布日期 |
2012.10.16 |
申请号 |
US20070893590 |
申请日期 |
2007.08.15 |
申请人 |
RESNICK DAVID;MICRON TECHNOLOGY, INC. |
发明人 |
RESNICK DAVID |
分类号 |
G06F12/06;G06F12/00 |
主分类号 |
G06F12/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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